Typically, a digital imager array includes a focal plane array of pixel cells, each one of the cells including a photo-conversion device such as, e.g., a photogate, photoconductor, or a photodiode. In a complementary metal oxide semiconductor (CMOS) imager, each pixel cell also has a readout circuit that typically includes a source follower output transistor. The photo-conversion device converts photons to electrons which are typically transferred to a floating diffusion region connected to the gate of the source follower output transistor. A charge transfer device (e.g., transistor) can be included for transferring charge from the photo-conversion device to the floating diffusion region. In addition, such imager cells typically have a transistor for resetting the floating diffusion region to a predetermined charge level prior to charge transfer. The output of the source follower transistor is a voltage output on a column line when a row select transistor for the row containing the pixel is activated.
Exemplary CMOS imaging circuits, processing steps thereof, and detailed descriptions of the functions of various CMOS elements of an imaging circuit are described, for example, in U.S. Pat. No. 6,140,630 to Rhodes, U.S. Pat. No. 6,376,868 to Rhodes, U.S. Pat. No. 6,310,366 to Rhodes et al., U.S. Pat. No. 6,326,652 to Rhodes, U.S. Pat. No. 6,204,524 to Rhodes, and U.S. Pat. No. 6,333,205 to Rhodes. The disclosures of each of the foregoing are hereby incorporated by reference herein in their entirety.
One typical CMOS imager pixel circuit, the three-transistor (3T) pixel, contains a photo-conversion device for supplying photo-generated charge to a diffusion region; a reset transistor for resetting the diffusion region; a source follower transistor having a gate connected to the diffusion region, for producing an output signal; and a row select transistor for selectively connecting the source follower transistor to a column line of a pixel array. Three-transistor pixel cells have been used to support automatic light control (ALC) operations. ALC is used to control the amount of light integrated by a pixel cell. In a 3T pixel cell, the charge accumulated by a photo-conversion device may be read out prior to resetting the photo-conversion device to a predetermined voltage. Therefore, ALC operations may determine a time for readout based on the amount of charge generated by the photo-conversion device and may adjust the amount of charge further generated by the photo-conversion device in response to the charge present on the photo-conversion device at a particular time.
Another typical CMOS imager pixel employs a four-transistor (4T) configuration, which is similar to the 3T configuration, but utilizes a transfer transistor to gate charge carrier flow from the photo-conversion device to a sensing node, typically a floating diffusion region. In a 4T configuration, the source follower transistor gate is connected to the floating diffusion region. In contrast to the 3T configuration, the 4T configuration facilitates correlated double sampling (CDS), a technique that reduces noise.
A top view of a portion of a semiconductor wafer fragment containing a CMOS 4T pixel cell 100 is shown in FIG. 1. A cross-sectional view of a portion of the pixel is illustrated in FIG. 2. CMOS pixel cell 100 generally comprises a photo-conversion device 120, in the form of a p-n-p photodiode, for generating free charge carriers in response to external light 187 incident on the pixel, and a transfer gate 106′ of transistor 106 for transferring photo-generated charge carriers from the region 122 of photo-conversion device 120 to a sensing node, typically a floating diffusion region 110. The floating diffusion region 110 is electrically connected to the gate 108′ of an output source follower transistor 108. The pixel cell 100 also includes a reset transistor 107 having a gate 107′ for resetting the floating diffusion region 110 to a predetermined voltage before sensing a signal; and a row select transistor 109 having a gate 109′ for outputting a signal from the source follower transistor 108 to an output terminal 111 in response to a row select signal. There are also source/drain regions 115 for the reset, source follower, and row select transistors.
As noted, FIG. 2 is a cross-sectional view of the pixel cell 100 of FIG. 1 taken along line 1-1′. The CMOS pixel cell 100 has a pinned p-n-p photodiode 120 as the photosensor device. Pinned photodiode 120 is adjacent to the gate 106′ of a transfer transistor 106 and has a p-type surface layer 123 and an n-type photodiode collection region 122 within a p-type substrate 101.
In the CMOS pixel cell 100 depicted in FIGS. 1 and 2, free electrons are generated by incident light, represented by arrows 187, and accumulate in the n-type photodiode collection region 122. This photo-generated charge is transferred to the floating diffusion region 110 when gate 106′ receives a signal that turns on the transfer transistor 106. The source follower transistor 108 produces an output signal from the transferred charge in response to the voltage level received by gate 108′.
Pixel cell 100 is capable of supporting correlated double sampling (CDS) to reduce noise and obtain a more accurate pixel signal. For CDS, the floating diffusion region 110 begins at a predetermined reset voltage level by turning on reset gate 107′; thereafter, the reset voltage produced by the source follower transistor 108 is read out through the row select transistor 109 as a pixel reset signal Vrst. Then, integrated photo-generated charge from pinned photodiode 120 is transferred to the floating diffusion region 110 by operation of transfer gate 106′ and a pixel image signal Vsig is read out via the source follower transistor 108. The two values, Vrst and Vsig, are subtracted thereby reducing noise. Additionally, 4T pixel cell 100 provides lower dark current, which also reduces noise.
Although 4T pixel cells, and other similarly configured pixel cells, make it possible to perform correlated double sampling (CDS), they also may interfere with ALC. In a conventional 4T pixel cell 100, because the transfer gate 106′ gates the flow of photo-generated charge from the photo-conversion device 120 to the floating diffusion region 110 and, therefore, to readout circuitry, it is not possible to read out photo-generated charge without altering the charge on the photo-conversion device 120. When a 4T readout path is employed to monitor charge level in an ALC operation, the transfer of charge carriers through the transfer transistor therefore tends to destroy or alter the image signal, thus resulting in a degraded image. Therefore, ALC is not readily used with a conventional 4T pixel cell.
It would be advantageous to have improved techniques for measuring pixel light levels reaching a photo-conversion device and to obtain a non-destructive readout of this measurement during the charge integration time of the photo-conversion device.